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ISL29003
Control Register 01(hex)
The Read/Write control register has three functions:
1. Interrupt flag; Bit 5. This is the status bit of the interrupt.
The bit is set to logic high when the interrupt thresholds
have been triggered, and logic low when not yet
triggered. Writing a logic low clears/resets the status bit.
TABLE 8. INTERRUPT FLAG
Sensor Data Register 04(hex) and 05(hex)
When the device is configured to output a signed 15-bit data,
the most significant byte is accessed at 04(hex), and the
least significant byte can be accessed at 05(hex). The
sensor data register is refreshed after very integration cycle.
Timer Data Register 06(hex) and 07(hex)
Note that the timer counter value is only available when
BIT 5
0
1
OPERATION
Interrupt is cleared or not triggered yet
Interrupt is triggered
using the External Timing Mode. The 06(hex) and 07(hex)
are the LSB and MSB respectively of a 16-bit timer counter
value corresponding to the most recent sensor reading.
Each clock cycle increments the counter. At the end of each
2. Range/Gain; Bits 3 and 2. The Full Scale Range can be
adjusted by an external resistor R EXT and/or it can be
adjusted via I 2 C using the Gain/Range function.
Gain/Range has four possible values, Range(k) where k
is 1 through 4. Table 9 lists the possible values of
Range(k) and the resulting FSR for some typical value
R EXT resistors.
TABLE 9. RANGE/GAIN TYPICAL FSR LUX RANGES
integration period, the value of this counter is made available
over the I 2 C. This value can be used to eliminate noise
introduced by slight timing errors caused by imprecise
external timing. Microcontrollers, for example, often cannot
provide high-accuracy command-to-command timing, and
the timer counter value can be used to eliminate the
resulting noise.
TABLE 11. DATA REGISTERS
BITS
FSR LUX
RANGE@
FSR LUX
RANGE@
FSR LUX
RANGE@
ADDRESS
(hex)
CONTENTS
3:2 k RANGE(k)
R EX T = 50k
R EX T = 100k R EX T = 500k
04
Least-significant byte of most recent sensor reading.
0:0
0:1
1:0
1:1
1
2
3
4
2,000
8,000
32,000
128,000
2,000
8,000
32,000
128,000
1,000
4,000
16,000
64,000
200
800
3200
12,800
05
06
07
Most-significant byte of most recent sensor reading.
Least-significant byte of timer counter value
corresponding to most recent sensor reading.
Most-significant byte of timer counter value
corresponding to most recent sensor reading.
Interrupt persist; Bits 1 and 0. The interrupt pin and the
interrupt flag is triggered/set when the data sensor reading is
out of the interrupt threshold window after m consecutive
number of integration cycles. The interrupt persist bits
determine m.
Calculating Lux
The ISL29012’s output codes, DATA, are directly
proportional to lux.
E = α × DATA
(EQ. 1)
TABLE 10. INTERRUPT PERSIST
The proportionality constant α is determined by the Full
BITS 1:0
0:0
0:1
NUMBER OF INTEGRATION CYCLES
1
4
Scale Range (FSR), and the n-bit ADC which is user defined
in the command register. The proportionality constant can
also be viewed as the resolution; The smallest lux
measurement the device can measure is α .
α = ------------
2
1:0
1:1
8
16
FSR
n
(EQ. 2)
Interrupt Threshold HI Register 02(hex)
This register sets the HI threshold for the interrupt pin and
the interrupt flag. By default the Interrupt threshold HI is
Full Scale Range (FSR), is determined by the software
programmable Range/Gain, Range(k), in the command
register and an external scaling resistor R EXT which is
referenced to 100k Ω .
FSR = Range ( k ) × ------------------
FF(hex). The 8-bit data written to the register represents the
upper MSB of a 16-bit value. The LSB is always 00(hex).
Interrupt Threshold LO Register 03(hex)
This register sets the LO threshold for the interrupt pin and
the interrupt flag. By default, the Interrupt threshold LO is
00(hex). The 8-bit data written to the register represents the
upper MSB of a 16-bit value. The LSB is always 00(hex).
6
100k Ω
R EXT
(EQ. 3)
FN6476.2
November 17, 2011
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